refer to Operating Rules #10 in this datasheet. Ordering Code: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering. Part Number: 74LS, Maunfacturer: National Semiconductor, Part Family: 74, File type: PDF, Document: Datasheet – semiconductor. 74LS datasheet, 74LS pdf, 74LS data sheet, datasheet, data sheet, pdf, Fairchild Semiconductor, Dual Non-Retriggerable One-Shot with Clear and.
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DescriptionThe absolute maximum dtasheet of the 74LS00N are: In most applications, pulse stability will only be limited by the accuracy of external timing components. The pin-out is identical to DM74LS but, functionally it is not. If pulse cutoff is not critical, capacitance up to mF and resistance as low as 1. The clear CLR input can terminate the output.
Input Current Max Input Voltage. Each multivibrator of the 74LS features a negative-transition-triggered input and a positive-transition-triggered input either of which can be used as an inhibit input.
Not more than one output should be shorted at a time, and the duration should not exceed one second. I CC Supply Current. The clear CLR input can terminate the output pulse at a predetermined time independent of the timing components.
Pulse triggering occurs at a voltage level and is not related to the transition time of the input pulse. The DM74LS is a dual monostable multivibrator with. When you place an order, your payment is made to SeekIC and not to your seller.
The range of jitter-free pulse widths is extended if VCC is 5. Jitter-free operation is maintained over the full temperature and VCC ranges for greater than six decades of timing capacitance 10 pF to 10 mFand greater than one decade of timing resistance 2.
This mode of triggering requires first the B input be set from a. You may also be interested in: To obtain the best and trouble free operation from this device please read operating rules as well as the Fair- child Semiconductor one-shot application notes carefully and observe recommendations. Devices also available in Tape and Reel. V I Input Clamp Voltage. Additionally an internal latching. This provides the input with excellent noise immunity.
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Freight and Payment Recommended logistics Recommended bank. Additionally an internal latching circuit at the input stage also provides a high immunity to V CC noise.
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Each device has three inputs permit. Margin,quality,low-cost products with low minimum orders. Each device has three inputs permit- ting the choice datasheeet either leading-edge or trailing-edge trig- gering. To obtain the best and trouble free operation from. This CLR input also serves as a trigger input when it is pulsed with a low level pulse transition.
Motorola 74LS Series Datasheets. 74LSN, SN54LS Datasheet.
I OS Short Circuit. A high immunity to VCC noise is also provided by internal latching circuitry. The output pulses can be terminated by the overriding clear. Month Sales Transactions. This CLR input also serves as a trigger. Input pulse width may be of any duration relative to the output pulse width. Output pulse width may be varied from dayasheet nanoseconds to a maximum of 70 s by choosing appropriate timing datasheer.
Please create an account or Sign in. Pin A is an active-LOW trigger transition input and.